I intend to support both old recovered MOS 6502 chips, as well as the modern currently in-production WDC W65C02S chips.
This requires a couple of jumpers, due to pin-out changes on the newer 65C02. But it is definately worth supporting both on a single 6502 CPU Card design (for flexibility).
I recently made a post and video on building and using a 6502 NOP tester, where I tested some newly received MOS 6502 chips, and a newly purchased WDC W65C02S chip, all in preparation for testing the first CPU Card PCB (when I finally have some prototype PCBs!).
You'll find the 6502 NOP Tester topic here: Building a 6502 (and W65C02) NOP Tester
The Schematic and PCB layout was completed, and v1.0 gerbers sent off for prototype PCB manufacture in Nov 2023.
Finally, the first v1.0 PCB was assembled and tested. You can follow along here: Minimalist Europe Card Bus (MECB) - MOS 6502 or WDC W65C02 CPU Card
Subsequent Version Updates:
- v1.1 - Minor correction to a ROM Write Enable Jumper oversight. The ROM /WE pin (on v1.0), was permanently pulled high.
- v1.2 - Minor change to the PLD (U1) and ROM (U4) footprints, to accomodate ZIF socket pins (1mm instead of 0.8mm pad holes) - Thank you goes to Michael for pointing this out.
- v1.3 - Adds support for NMI via onboard debounced push-button and NMI push-button header, replicating the existing Reset push-button and header.