Oh, I completely missed that the ROM expansion had the option to connect the full address space to the bus - I had only previously used it via the switch selection and so assumed that it wasn't fully available - looks like all I need to do is reprogram the PLD. I do have all address lines going out to the bus (including the extra A20 and A21 that you get with the PLCC version of the 68008). Speaking of which, I had a comedy of errors in trying to get the plug for the Eurobus - I thought I ordered the correct plug but when it arrived I realised it only had two rows of pins ... so again I placed an order thinking I had the right one and it had three rows but with actual pins in the middle row ... I had to manually pull out those middle pins so that I could solder it on the board - it felt like pulling teeth!
I've set up the board with 0.5 MB RAM ($000000-$07FFFF, allowing expansion up to 2 MB continuous if needed via the MECB bus), 0.5 MB ROM ($200000-$27FFFF) and the I/O is mapped to $3C0000-$3CFFFF (it's wasting much more space than it needs to but I didn't have much room for finer granularity). During boot, it temporarily maps the ROM to the lower part of the memory space so that the RESET vectors can be accessed (upon reset the vector table can be modified in RAM - to allow redirection, using a trick I noticed on another 68000 board). I'm still not entirely confident with peripheral handling (I've only had to deal with 68000 devices on a 68000 previously - and that's much easier) and whether I'm handling the traditional-style interrupts and the MECB_MREQ signal correctly. So far things seem to be working fine with the ACIA, PTM and VDP and it seemed I was able to get interrupts working with the PTM. I made a whole series of blunders mixing up the active state of the ECB_RD and ECB_WR signals so I've got way too many bodge wires on the back of the board.
Anyway, your prompt above has given me an idea to test the expansion ROM in the $080000-$0FFFFF space (so it'll needs a little modification to the PLD) - that'll at least let me know if I have the MECB_MREQ signal working. I can easily test it without even having to overwrite what is already in there (It has a mix of 6809 and 6502 software) - I can just check via TUTOR to see if that data appears in the memory space. I could possibly add a hack to the expansion ROM board to connect up the upper address lines to shift it up to the same location as my current ROM - that would then allow me to perhaps replace the on-board ROM with another RAM. Although, at least for the time-being both seem to have ample space for messing about. If I ever want to run CP/M on there things might change - but there would be a lot of extra work to get to that point (and I'm not really clear as to how usable CP/M is on that platform anyway). The main thing the system is missing at the moment is somewhere to load/save things. Anyway, it would be nice to confirm whether or not the board is playing nice with the MECB_MREQ signal.
BTW, TUTOR has been great for debugging - it's really nice being able to load, set breakpoints and single-step to see what is happening (it really paid off having those early MAME experiments as it made the software modifications for this board quite simple).