Greetings luRaichu, I am looking into the possibilities of making an MECB simple memory manager using PLD to do the support logic together with latches for the address bus lines. I haven't got very far yet having to learn PLD design as part of the process. I have heard of the 6829 but I was led to ...

When I shifted to the W6 setting I had the same garbled screen regardless of whether I had the 12 MHz or 16 MHz clock. With the W4 setting things worked fine with the 12 MHz clock but would sometimes seemed to ignore commands sent to the VDP (but the screen would not be garbled).

In other news, I ...