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/*
 *
 * Logic: 6502 CPU Card - Bus Control  
 *
 * ecb_mreq : ioaddr not asserted, while clk high.
 * ecb_iorq : ioaddr asserted, while clk high.
 * ecb_clk : clk
 * ecb_rd : cpu_rw is high, while clk high.
 * ecb_wr : cpu_rw is low, while clk high.
 *
 */
/*
ecb_mreq = !ioaddr & clk;
ecb_iorq =  ioaddr & clk;
ecb_clk = clk;
ecb_rd = cpu_rw & clk;
ecb_wr = !cpu_rw & clk;
*/
/*
 *
 * Logic: 6502 CPU Card - Alternative Bus Control  
 *
 * ecb_mreq : ioaddr not asserted.
 * ecb_iorq : ioaddr asserted, while clk high.
 * ecb_clk : clk
 * ecb_rd : cpu_rw is high, while clk high.
 * ecb_wr : cpu_rw is low, while clk high.
 *
 */

ecb_mreq = !ioaddr;
ecb_iorq =  ioaddr & clk;
ecb_clk = clk;
ecb_rd = cpu_rw & clk;
ecb_wr = !cpu_rw & clk;

/*
 * Memory Map options follow (un-comment only one!)
 */

/*
 *
 * Logic: 6502 CPU Card - Chip Selects for 56K RAM 8K ROM 
 *
 * cs_rom : ROM address space (0xE000 - 0xFFFF), while ecb_mreq asserted.
 * cs_ram : RAM address space (0x0000 - 0xDFFF), while ecb_mreq asserted.
 * cs_spare : Unused, but assigned to replicate ecb_iorq.
 *
 */
/*
cs_rom = ecb_mreq & a15 & a14 & a13;
cs_ram = ecb_mreq & !(a15 & a14 & a13);
cs_spare = ioaddr & clk;
*/
/*
 *
 * Logic: 6502 CPU Card - Alternative Chip Selects for 56K RAM 8K ROM 
 *
 * cs_rom : ROM address space (0xE000 - 0xFFFF), while ecb_mreq & CPU Read asserted.
 * cs_ram : RAM address space (0x0000 - 0xDFFF), while ecb_mreq & clk asserted.
 * cs_spare : Unused, but assigned to replicate ecb_iorq.
 *
 */

cs_rom = ecb_mreq & cpu_rw & a15 & a14 & a13;
cs_ram = ecb_mreq & clk & !(a15 & a14 & a13);
cs_spare = ioaddr & clk;