I/O mapped to F0xx

[epaell]

I ran my test with just the CPU card and it likely confirms your suspicion. The code ran at 4 MHz and dumped the last detected location of memory in to the ROM. At 8 MHz it didn't do this. The test only required the CPU board to run.

[Editor]

I ran my test with just the CPU card and it likely confirms your suspicion. The code ran at 4 MHz and dumped the last detected location of memory in to the ROM. At 8 MHz it didn't do this. The test only required the CPU board to run.

OK, I have the 6502 CPU Card + MC68B50 ACIA (on the Motorola I/O Card) running at 8MHz!

My curiosity got the better of me, so I took some time out to test my thought (2) theory, from above.

I was thrilled to find I didn't even need to go to the faster SST ROM (on ROM Expansion Card). The CPU Card alone worked fine!

In summary, I loaded my simple "Hello 6502 World" ROM in the AT28C256 on the CPU Card, together with a WDC W65C02S CPU.
I first verified it worked at 2MHz and then 4MHz, but failed at 8MHz.

Then I modified the 6502 CPU Card PLD to relax the ROM Chip Select timing (to no longer require CLK high).
Although expecting I'd still need the faster ROM, I first tried it on the CPU Card alone, and...

Success! With the updated PLD, and still with 150ns AT28C256, I had successful serial output at 8MHz Clock!
Repeated tests showed this as a reliable test result. Awesome!

If interested, I paste below the updated PLD "Alternative" Bus Control, and Chip Select logic.
Specifically, I have removed the CLK from the "Bus Control" MREQ logic. Then I have added the CLK to CS_RAM (to replicate CS_RAM's original logic), then for CS_ROM I have added CPU_RW (so CS_ROM is now gated with CPU R/W high, instead of CLK high).

Note: I only included CPU_RW for my own comfort. This will of course mean no EEPROM writes, but you could of course also try only the Address lines driving the CS_ROM logic (for the earliest possible ROM Chip Select).

Well, I call that a SUCCESS!

Code: Select all

/*
 *
 * Logic: 6502 CPU Card - Bus Control  
 *
 * ecb_mreq : ioaddr not asserted, while clk high.
 * ecb_iorq : ioaddr asserted, while clk high.
 * ecb_clk : clk
 * ecb_rd : cpu_rw is high, while clk high.
 * ecb_wr : cpu_rw is low, while clk high.
 *
 */
/*
ecb_mreq = !ioaddr & clk;
ecb_iorq =  ioaddr & clk;
ecb_clk = clk;
ecb_rd = cpu_rw & clk;
ecb_wr = !cpu_rw & clk;
*/
/*
 *
 * Logic: 6502 CPU Card - Alternative Bus Control  
 *
 * ecb_mreq : ioaddr not asserted.
 * ecb_iorq : ioaddr asserted, while clk high.
 * ecb_clk : clk
 * ecb_rd : cpu_rw is high, while clk high.
 * ecb_wr : cpu_rw is low, while clk high.
 *
 */

ecb_mreq = !ioaddr;
ecb_iorq =  ioaddr & clk;
ecb_clk = clk;
ecb_rd = cpu_rw & clk;
ecb_wr = !cpu_rw & clk;

/*
 * Memory Map options follow (un-comment only one!)
 */

/*
 *
 * Logic: 6502 CPU Card - Chip Selects for 56K RAM 8K ROM 
 *
 * cs_rom : ROM address space (0xE000 - 0xFFFF), while ecb_mreq asserted.
 * cs_ram : RAM address space (0x0000 - 0xDFFF), while ecb_mreq asserted.
 * cs_spare : Unused, but assigned to replicate ecb_iorq.
 *
 */
/*
cs_rom = ecb_mreq & a15 & a14 & a13;
cs_ram = ecb_mreq & !(a15 & a14 & a13);
cs_spare = ioaddr & clk;
*/
/*
 *
 * Logic: 6502 CPU Card - Alternative Chip Selects for 56K RAM 8K ROM 
 *
 * cs_rom : ROM address space (0xE000 - 0xFFFF), while ecb_mreq & CPU Read asserted.
 * cs_ram : RAM address space (0x0000 - 0xDFFF), while ecb_mreq & clk asserted.
 * cs_spare : Unused, but assigned to replicate ecb_iorq.
 *
 */

cs_rom = ecb_mreq & cpu_rw & a15 & a14 & a13;
cs_ram = ecb_mreq & clk & !(a15 & a14 & a13);
cs_spare = ioaddr & clk;

[epaell]

Oh, that's weird. I tried a similar change this morning but couldn't get my system to work at 8 MHz and just to be sure just programmed the PLD with the code above (in case I missed something) but still the same problem (works at 4 MHz though). I must have a component on at least one of my boards that is not quite to the same spec as yours

[Editor]

Oh, that's weird. I tried a similar change this morning but couldn't get my system to work at 8 MHz and just to be sure just programmed the PLD with the code above (in case I missed something) but still the same problem (works at 4 MHz though). I must have a component on at least one of my boards that is not quite to the same spec as yours

I'd still suspect the 150ns EEPROM as the prime speed limiter. I'm still surprised mine works at 8MHz, given the full clock cycle time is only ~125ns!

Perhaps my AT28C256-15 is a bit faster than the label claims?

The other candidate would be the MC68B50 ACIA, which (of course) is only rated for 2MHz.

Everything else should be fine.

Perhaps I'm just a little lucky on both counts? But, never the less, the fact that mine is working is a great sign of the potential!

[epaell]

Admittedly, I was also surprised that it worked up to 4 MHz ... but now I'm feeling left out being unable to run at 8 MHz

Unfortunately I don't have any spares of the EEPROM or 68B50 with which I can try a replacement.

BTW, something odd I also noticed when I was running the 6840 checks with Michael; I tried modifying my code to use some of the bits that @lenzjo had in his code (to keep a record of something that looked more like a time as opposed to a big counter) but I couldn't get the STZ operation to work (it is a W65C02S-specific operation and compiled fine but just didn't clear the specified memory location); when I replaced it with LDA #$00; STA then it worked fine. I didn't really think about it at the time (as I'm not really familiar with fine details when working with the 6502) ... but now I'm wondering whether the CPU I have is perhaps not really a W65C02S?

[Editor]

... but now I'm wondering whether the CPU I have is perhaps not really a W65C02S?

Interesting. That may also contribute to speed issues. Where did you source it?

I get my WDC chips from Mouser, so I'm pretty confident they're genuine parts.

[epaell]

I "think" I got this one from Amazon ... which reminded me, I did also get one from Mouser (actually I purchased that one first but it took a really long time to arrive, since the Amazon one arrived before it and it appeared to work I never actually tried the Mouser one).

OK, so I tried the new processor and still can't get to 8 MHz but curiously it does work at 7.3728 MHz (which I couldn't get to with the other processor). So either my 8 MHz crystal has issues or I'm just at the curly end of the specifications for some of the other devices.

Ah, so I also tried the timer code again with the STZ's back in there and now it works at 4 MHz but doesn't work at 7.3728 MHz. So perhaps the timer chip can't quite handle this clock rate ... and I guess it confirms that my Amazon "W65C02S" is a bit on the dodgy side (possibly a relabelled 6502 of some kind).

A couple mysteries of the Universe solved but I guess I'll be sticking with 4 MHz and the Mouser CPU for now.